]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Ensure cache flushes prior to doing CS flips
authorChris Wilson <chris@chris-wilson.co.uk>
Mon, 27 Apr 2015 12:41:15 +0000 (13:41 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 20 May 2015 09:25:45 +0000 (11:25 +0200)
commit92db67bea0f3b94ff97ed52b6ea9828f7093a306
tree68481d946955c5b7536a3341d4964e42da6de78c
parente8513ff54da99b2e27af656e75bf45871d0b687a
drm/i915: Ensure cache flushes prior to doing CS flips

Synchronising to an object active on the same ring is a no-op, for the
benefit of execbuffer scheduler. However, for CS flips this means that
we can forgo checking whether the last write request of the object is
actually queued and more importantly whether the cache flush for the
write was emitted.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c