]> git.baikalelectronics.ru Git - kernel.git/commit
powerpc: Don't try to fix up misaligned load-with-reservation instructions
authorPaul Mackerras <paulus@ozlabs.org>
Tue, 4 Apr 2017 04:56:05 +0000 (14:56 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 4 Apr 2017 13:16:57 +0000 (23:16 +1000)
commit900275911b9b18105c870d159198b5ba0e76fdf4
tree4b95fe7ea85eb5aa0d33e43c4d9c0bae9dcd3bdc
parent1f98d336dc1e827925c866bd3d285dce4d34f446
powerpc: Don't try to fix up misaligned load-with-reservation instructions

In the past, there was only one load-with-reservation instruction,
lwarx, and if a program attempted a lwarx on a misaligned address, it
would take an alignment interrupt and the kernel handler would emulate
it as though it was lwzx, which was not really correct, but benign since
it is loading the right amount of data, and the lwarx should be paired
with a stwcx. to the same address, which would also cause an alignment
interrupt which would result in a SIGBUS being delivered to the process.

We now have 5 different sizes of load-with-reservation instruction. Of
those, lharx and ldarx cause an immediate SIGBUS by luck since their
entries in aligninfo[] overlap instructions which were not fixed up, but
lqarx overlaps with lhz and will be emulated as such. lbarx can never
generate an alignment interrupt since it only operates on 1 byte.

To straighten this out and fix the lqarx case, this adds code to detect
the l[hwdq]arx instructions and return without fixing them up, resulting
in a SIGBUS being delivered to the process.

Cc: stable@vger.kernel.org
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/kernel/align.c