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clk: at91: clk-sam9x60-pll: allow runtime changes for pll
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Thu, 19 Nov 2020 15:43:12 +0000 (17:43 +0200)
committerStephen Boyd <sboyd@kernel.org>
Sat, 19 Dec 2020 19:50:55 +0000 (11:50 -0800)
commit8dc4af8bef127425271e06d09370a2479dae69c3
tree63114c00b05016b1744a70d8380db17e0e911087tree | snapshot
parent0bb4623f13d46b2ea054777accff0c41af8036becommit | diff
clk: at91: clk-sam9x60-pll: allow runtime changes for pll

Allow runtime frequency changes for PLLs registered with proper flags.
This is necessary for CPU PLL on SAMA7G5 which is used by DVFS.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-7-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/at91/clk-sam9x60-pll.c diff | blob | history
drivers/clk/at91/pmc.h diff | blob | history
drivers/clk/at91/sam9x60.c diff | blob | history
drivers/clk/at91/sama7g5.c diff | blob | history
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