]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Read out display FIFO size on VLV/CHV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 5 Mar 2015 19:19:47 +0000 (21:19 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 17 Mar 2015 21:30:04 +0000 (22:30 +0100)
commit89f021c920b5e44d0d8d9002d4da77d7b1c7516a
tree41fa7c22ea3312fd153ac658aed330e29376e40f
parent0c911a890aeebaed44d55a71de549d77bfc1ab9a
drm/i915: Read out display FIFO size on VLV/CHV

VLV/CHV have similar DSPARB registers as older platforms, just more of
them due to more planes. Add a bit of code to read out the current FIFO
split from the registers. Will be useful later when we improve the WM
calculations.

v2: Add display_mmio_offset to DSPARB

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c