]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/glk: Plane color correction register changes
authorAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Thu, 26 Jan 2017 11:24:22 +0000 (13:24 +0200)
committerAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Mon, 30 Jan 2017 08:23:35 +0000 (10:23 +0200)
commit859e8e810ea02457da13edc1dc42dbdec608d2f9
treec38ca36062cdcf3a425046aebd4a7c243d835153
parentd2a2bf3f08c8679c731411a8bd55d7309700bb21
drm/i915/glk: Plane color correction register changes

In Geminilake, the bits for enabling pipe csc, pipe gamma and plane
gamma moved to a new register. So update the plane update functions
to set the right bits.

Pipe CSC is kept disabled though, since enabling that also enables the
dedicated degamma table, and that is not properly programmed yet,
leading to a black screen.

v2: Use plane_id. (Ville)
    Remove unnecessary variable. (Ville)
    Keep registers in offset order. (Ville)
    Don't set plane gamma disable twice. (Ander)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ander Conselvan De Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1485429865-10687-3-git-send-email-ander.conselvan.de.oliveira@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_sprite.c