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(parent: b0267ca) | patch
iommu/arm-smmu: Fix the values of ARM64_TCR_{I,O}RGN0_SHIFT
authorZhen Lei <thunder.leizhen@huawei.com>
Fri, 26 Jun 2015 08:32:59 +0000 (09:32 +0100)
committerWill Deacon <will.deacon@arm.com>
Wed, 8 Jul 2015 16:24:39 +0000 (17:24 +0100)
commit7a7e6bd2380a940365e4d6d7cee5933aaaf39bea
tree7689601af671e3aa4a4bab385028e736b054d51dtree | snapshot
parentb0267ca35bcaf6d300ba593511a53861331eedb6commit | diff
iommu/arm-smmu: Fix the values of ARM64_TCR_{I,O}RGN0_SHIFT

The arm64 CPU architecture defines TCR[8:11] as holding the inner and
outer memory attributes for TTBR0.

This patch fixes the ARM SMMUv3 driver to pack these bits into the
context descriptor, rather than picking up the TTBR1 attributes as it
currently does.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
drivers/iommu/arm-smmu-v3.c diff | blob | history
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