]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/chv: Use 16 and 32 for low and high drain latency precision.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 17 Oct 2014 15:05:08 +0000 (08:05 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 24 Oct 2014 14:34:12 +0000 (16:34 +0200)
commit789bcf5e03d7d54749549f462b94def991c5617d
tree4bff497aff1f50acb0e2a77bf1b190bd9538c405
parentf1b72173f34d1ddaa6d1e006005b18df452143d3
drm/i915/chv: Use 16 and 32 for low and high drain latency precision.

Current chv spec teels we can only use either 16 or 32 bits as precision.

Although in the past VLV went from 16/32 to 32/64 and spec might not be updated,
these precision values brings stability and fixes some issues Wayne was facing.

Cc: Wayne Boyer <wayne.boyer@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Wayne Boyer <wayne.boyer@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Sprinkle const as requested by Ville.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c