]> git.baikalelectronics.ru Git - kernel.git/commit
ASoC: cs42l42: Fix 1536000 Bit Clock instability
authorLucas Tanure <tanureal@opensource.cirrus.com>
Tue, 25 May 2021 09:08:19 +0000 (10:08 +0100)
committerMark Brown <broonie@sirena.org.uk>
Tue, 25 May 2021 15:45:03 +0000 (16:45 +0100)
commit7857dcf777cd0e85e0585ab4ad9d1c4681bfee9e
treeafa3df527c85efca7aac5e4f53105ba59d48baf1
parentb944c66342630687aeedcb2d71b9875d99557b7f
ASoC: cs42l42: Fix 1536000 Bit Clock instability

The 16 Bits, 2 channels, 48K sample rate use case needs
to configure a safer pll_divout during the start of PLL
After 800us from the start of PLL the correct pll_divout
can be set

Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
Reviewed-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Message-Id: <20210525090822.64577-1-tanureal@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@sirena.org.uk>
sound/soc/codecs/cs42l42.c
sound/soc/codecs/cs42l42.h