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(parent: 1e7bae8) | patch
clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domain
authorTomasz Figa <t.figa@samsung.com>
Tue, 15 Oct 2013 17:41:17 +0000 (19:41 +0200)
committerTomasz Figa <t.figa@samsung.com>
Mon, 30 Dec 2013 17:15:47 +0000 (18:15 +0100)
commit74f6d6313f622526dfbe40ca5e07d6cc6c54a70d
tree89defc880d949726f721dac203c9bfcb2b989624tree | snapshot
parent1e7bae8e5635f17a23b059cfa1e8e5b96475a43ecommit | diff
clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domain

This patch adds mout_aclk266_gscl_sub mux clock and adjusts definitions
of GSCL domain gate clocks to use it as their parent, as specified in
SoC documentation.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
drivers/clk/samsung/clk-exynos5250.c diff | blob | history
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