]> git.baikalelectronics.ru Git - kernel.git/commit
phy: lynx-28g: serialize concurrent phy_set_mode_ext() calls to shared registers
authorVladimir Oltean <vladimir.oltean@nxp.com>
Wed, 4 Oct 2023 11:17:08 +0000 (14:17 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 19 Oct 2023 21:08:52 +0000 (23:08 +0200)
commit6f901f8448c6b25ed843796b114471d2a3fc5dfb
treebc86e2ef53e138a16f67b24ce958a453ee3613a7
parente173d9a2e5484b9b4a3370ac632d46962a4ee5db
phy: lynx-28g: serialize concurrent phy_set_mode_ext() calls to shared registers

[ Upstream commit 139ad1143151a07be93bf741d4ea7c89e59f89ce ]

The protocol converter configuration registers PCC8, PCCC, PCCD
(implemented by the driver), as well as others, control protocol
converters from multiple lanes (each represented as a different
struct phy). So, if there are simultaneous calls to phy_set_mode_ext()
to lanes sharing the same PCC register (either for the "old" or for the
"new" protocol), corruption of the values programmed to hardware is
possible, because lynx_28g_rmw() has no locking.

Add a spinlock in the struct lynx_28g_priv shared by all lanes, and take
the global spinlock from the phy_ops :: set_mode() implementation. There
are no other callers which modify PCC registers.

Fixes: 8f73b37cf3fb ("phy: add support for the Layerscape SerDes 28G")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/phy/freescale/phy-fsl-lynx-28g.c