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soc/tegra: pmc: Fix pad voltage configuration for Tegra186
authorAapo Vienamo <avienamo@nvidia.com>
Fri, 10 Aug 2018 18:08:07 +0000 (21:08 +0300)
committerThierry Reding <treding@nvidia.com>
Mon, 27 Aug 2018 10:25:17 +0000 (12:25 +0200)
commit6ea6fa182d3f438b37561d2d20451ba860132d5c
tree231b0f8fefa0be14b109b2502011adea6c77bd87tree | snapshot
parentb03437e3f3aad5113acfec0556379049cb6c3674commit | diff
soc/tegra: pmc: Fix pad voltage configuration for Tegra186

Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/soc/tegra/pmc.c diff | blob | history
include/soc/tegra/pmc.h diff | blob | history
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