]> git.baikalelectronics.ru Git - kernel.git/commit
mm: generalise COW SMC TLB flushing race comment
authorNicholas Piggin <npiggin@gmail.com>
Tue, 29 Dec 2020 23:14:43 +0000 (15:14 -0800)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 29 Dec 2020 23:36:49 +0000 (15:36 -0800)
commit6cb5b02960da7372fb92f5e82fd7981b6189d31e
treeab72fb0a5c4dac6c8ba09036e0d182b21442600b
parent56ebfb7529854edd27bb3f85ccd16b681ef5a6db
mm: generalise COW SMC TLB flushing race comment

I'm not sure if I'm completely missing something here, but AFAIKS the
reference to the mysterious "COW SMC race" confuses the issue.  The
original changelog and mailing list thread didn't help me either.

This SMC race is where the problem was detected, but isn't the general
problem bigger and more obvious: that the new PTE could be picked up at
any time by any TLB while entries for the old PTE exist in other TLBs
before the TLB flush takes effect?

The case where the iTLB and dTLB of a CPU are pointing at different pages
is an interesting one but follows from the general problem.

The other (minor) thing with the comment I think it makes it a bit clearer
to say what the old code was doing (i.e., it avoids the race as opposed to
what?).

References: fa5250c0f1f4d ("mm: fix a race condition under SMC + COW")
Link: https://lkml.kernel.org/r/20201215121119.351650-1-npiggin@gmail.com
Reviewed-by: Matthew Wilcox (Oracle) <willy@infradead.org>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Hugh Dickins <hughd@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suresh Siddha <sbsiddha@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
mm/memory.c