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(parent: 2e40d9b) | patch
drm/amd/amdgpu: Move PWR_MISC_CNTL_STATUS to its own header
authorTom St Denis <tom.stdenis@amd.com>
Wed, 25 Mar 2020 17:44:54 +0000 (13:44 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Apr 2020 18:44:43 +0000 (14:44 -0400)
commit6c33a6f4c8a6db1f208bb5e1c250a3328961e35e
tree7ec51ce8507647e3e84d05ccffd68cedff71c575tree | snapshot
parent2e40d9b915d4b95ea9eb7de471fe76267ddf31e8commit | diff
drm/amd/amdgpu: Move PWR_MISC_CNTL_STATUS to its own header

The register is part of the PWR block not the GC block.  Move to
its own header.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h diff | blob | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h diff | blob | history
drivers/gpu/drm/amd/include/asic_reg/pwr/pwr_10_0_offset.h [new file with mode: 0644] blob
drivers/gpu/drm/amd/include/asic_reg/pwr/pwr_10_0_sh_mask.h [new file with mode: 0644] blob
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