]> git.baikalelectronics.ru Git - kernel.git/commit
dt-bindings: Update the riscv,isa string description
authorAtish Patra <atish.patra@wdc.com>
Sat, 3 Aug 2019 04:27:23 +0000 (21:27 -0700)
committerPaul Walmsley <paul.walmsley@sifive.com>
Thu, 8 Aug 2019 23:05:38 +0000 (16:05 -0700)
commit69974314d8d1fd38736ba0b32c73cd3e5c879c52
tree8fd9a56c5a8d11503506ddcc18c501882156cfe8
parent06fd72737cd225d1e2af98fdfb4014e47796c97e
dt-bindings: Update the riscv,isa string description

Since the RISC-V specification states that ISA description strings are
case-insensitive, there's no functional difference between mixed-case,
upper-case, and lower-case ISA strings. Thus, to simplify parsing,
specify that the letters present in "riscv,isa" must be all lowercase.

Suggested-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Documentation/devicetree/bindings/riscv/cpus.yaml