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(parent: dcf82c6) | patch
[IA64] forbid ptrace changes psr.ri to 3
authorShaohua Li <shaohua.li@intel.com>
Fri, 17 Aug 2007 20:43:50 +0000 (13:43 -0700)
committerTony Luck <tony.luck@intel.com>
Fri, 17 Aug 2007 20:43:50 +0000 (13:43 -0700)
commit68d3611147197f97ff3ce76bf668330e460427a1
tree2e753d921e182653acf7badb1c6ebc0761047d7ftree | snapshot
parentdcf82c62f2472615cb47cf615d245cd5e6e66164commit | diff
[IA64] forbid ptrace changes psr.ri to 3

The "ri" field in the processor status register only has defined
values of 0, 1, 2.  Do not let ptrace set this to 3.  As with
other reserved fields in registers we silently discard the value.

Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
arch/ia64/kernel/ptrace.c diff | blob | history
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