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(parent: 658a900) | patch
MIPS: mm: c-r4k: Set the correct ISA level
authorMarkos Chandras <markos.chandras@imgtec.com>
Tue, 2 Dec 2014 15:30:19 +0000 (15:30 +0000)
committerMarkos Chandras <markos.chandras@imgtec.com>
Tue, 17 Feb 2015 15:37:31 +0000 (15:37 +0000)
commit65c452eeef76d89f2f289cc68d43e9b2f7942066
tree2304dbbb0b303b67d5622cddb95abc62331a1677tree | snapshot
parent658a900ed03b697cbb6fee1501486af23dc112eccommit | diff
MIPS: mm: c-r4k: Set the correct ISA level

The local_r4k_flush_cache_sigtramp function uses the 'cache'
instruction inside an asm block. However, MIPS R6 changed the
opcode for the cache instruction and as a result of which we
need to set the correct ISA level.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
arch/mips/mm/c-r4k.c diff | blob | history
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