]> git.baikalelectronics.ru Git - kernel.git/commit
gianfar: fix fiper alignment after resetting the time
authorRichard Cochran <richardcochran@gmail.com>
Sat, 6 Aug 2011 21:03:03 +0000 (21:03 +0000)
committerDavid S. Miller <davem@davemloft.net>
Mon, 8 Aug 2011 05:53:22 +0000 (22:53 -0700)
commit635238fc6b4665bbbea0cb0b5ede61270d5cec68
treeaea5d69fa11b2925336ac61c83a122611bb57808
parentec1574682f3820ac6751d6628dccf70e2e3755dc
gianfar: fix fiper alignment after resetting the time

After resetting the time, the PPS signals on the FIPER output channels
are incorrectly offset from the clock time, as can be readily verified
by a looping back the FIPER to the external time stamp input.

Despite its name, setting the "Fiper Realignment Disable" bit seems to
fix the problem, at least on the P2020.

Also, following the example code from the Freescale BSP, it is not really
necessary to disable and re-enable the timer in order to reprogram the
FIPER. (The documentation is rather unclear on this point. It seems that
writing to the alarm register also disables the FIPER.)

Signed-off-by: Richard Cochran <richard.cochran@omicron.at>
Cc: <stable@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/gianfar_ptp.c