]> git.baikalelectronics.ru Git - kernel.git/commit
xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config.
authorScott Telford <stelford@cadence.com>
Thu, 15 Sep 2016 15:26:45 +0000 (16:26 +0100)
committerMax Filippov <jcmvbkbc@gmail.com>
Mon, 19 Sep 2016 18:51:32 +0000 (11:51 -0700)
commit62f1df71c2a3cd841e3cbeac0a7cc879dd7a8ed7
treee0dd6dbdafc17293c491524ce1786a4df5ddc4da
parent58c818ce0f8824ade8c1ccc08bf37ac6e9c9da0e
xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config.

Add module parameter xilinx_uartps.rx_trigger_level=32 to command line
options for CSP to set Rx watermark for xuartps driver lower than the
default value, to avoid UART overruns at 115200 bps.

Signed-off-by: Scott Telford <stelford@cadence.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
arch/xtensa/boot/dts/csp.dts