]> git.baikalelectronics.ru Git - kernel.git/commit
clk: sunxi-ng: r40: Add minimal rate for video PLLs
authorJernej Skrabec <jernej.skrabec@siol.net>
Mon, 25 Jun 2018 12:02:41 +0000 (14:02 +0200)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Wed, 27 Jun 2018 17:06:38 +0000 (19:06 +0200)
commit6055b0dd676474e1c5fd42dbd74301b5b2da0903
tree2b3bd8dd4262971ea9d3b40e7135d2f990d39095
parent0d5624e606504772b89d3c3d6b1be740ef176c61
clk: sunxi-ng: r40: Add minimal rate for video PLLs

According to documentation and experience with other similar SoCs, video
PLLs don't work stable if their output frequency is set below 192 MHz.

Because of that, set minimal rate to both R40 video PLLs to 192 MHz.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
drivers/clk/sunxi-ng/ccu-sun8i-r40.c