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ARM: zImage: __armv3_mpu_cache_flush: respect should-be-zero specification
authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tue, 26 Jan 2010 21:18:09 +0000 (22:18 +0100)
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Thu, 17 Jun 2010 09:10:03 +0000 (11:10 +0200)
commit5d6c948153281598c30b0dbc2dadb5edba8bead1
treecb39d230589ee6451ecb45151e5b0069e27bf02ftree | snapshot
parentb5934615e247f48c857ca931b03e4719ebe975a6commit | diff
ARM: zImage: __armv3_mpu_cache_flush: respect should-be-zero specification

Probably the register content for cache operations is "don't care" in
practice, but as r1 is explicitly zeroed, use that one.

Acked-by: Eric Miao <eric.miao@canonical.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
arch/arm/boot/compressed/head.S diff | blob | history
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