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(parent: 2c88aaa) | patch
cxgb4: fix offset in collecting TX rate limit info
authorRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Fri, 18 May 2018 13:43:37 +0000 (19:13 +0530)
committerDavid S. Miller <davem@davemloft.net>
Fri, 18 May 2018 17:54:48 +0000 (13:54 -0400)
commit5d1b228942cadf3c3bea0aedb0345a2c32ffd034
tree6173edee4d7650284e93c23880791941a399428ftree | snapshot
parent2c88aaa03c392f8f61a4886d76e924b3068dc904commit | diff
cxgb4: fix offset in collecting TX rate limit info

Correct the indirect register offsets in collecting TX rate limit info
in UP CIM logs.

Also, T5 doesn't support these indirect register offsets, so remove
them from collection logic.

Fixes: 49a37d077648 ("cxgb4: collect TX rate limit info in UP CIM logs")
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h diff | blob | history
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