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(parent: eac1ca0) | patch
perf/x86/intel/pt: add new capability for Intel PT
authorLuwei Kang <luwei.kang@intel.com>
Wed, 24 Oct 2018 08:05:09 +0000 (16:05 +0800)
committerPaolo Bonzini <pbonzini@redhat.com>
Fri, 21 Dec 2018 10:28:33 +0000 (11:28 +0100)
commit57d6f5fd37ffc91539ce1b638c73409d967bbce7
treedfb792719c9c40b038ee553e2592dc87b90a2108tree | snapshot
parenteac1ca01ec64359b39511289004baa8355ea7f5ccommit | diff
perf/x86/intel/pt: add new capability for Intel PT

This adds support for "output to Trace Transport subsystem"
capability of Intel PT. It means that PT can output its
trace to an MMIO address range rather than system memory buffer.

Acked-by: Song Liu <songliubraving@fb.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/events/intel/pt.c diff | blob | history
arch/x86/include/asm/intel_pt.h diff | blob | history
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