]> git.baikalelectronics.ru Git - kernel.git/commit
KVM: x86: Purge "highest ISR" cache when updating APICv state
authorSean Christopherson <seanjc@google.com>
Fri, 6 Jan 2023 01:12:35 +0000 (01:12 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 10 Mar 2023 08:34:11 +0000 (09:34 +0100)
commit55d1c50599cecb3222d3e2307e670baede716b9a
tree4dd6d69a759e63428907ec7370d2fe2082514a97
parent26a3cb1eb06db22e0cafece0066f757ef26bd4cd
KVM: x86: Purge "highest ISR" cache when updating APICv state

commit fbe9ee97fd8fa735a5d1902f374d0e39a6bb3f14 upstream.

Purge the "highest ISR" cache when updating APICv state on a vCPU.  The
cache must not be used when APICv is active as hardware may emulate EOIs
(and other operations) without exiting to KVM.

This fixes a bug where KVM will effectively block IRQs in perpetuity due
to the "highest ISR" never getting reset if APICv is activated on a vCPU
while an IRQ is in-service.  Hardware emulates the EOI and KVM never gets
a chance to update its cache.

Fixes: ed484a2f459d ("kvm: lapic: Introduce APICv update helper function")
Cc: stable@vger.kernel.org
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20230106011306.85230-3-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/kvm/lapic.c