]> git.baikalelectronics.ru Git - kernel.git/commit
perf/x86/intel/uncore: Fix IRP uncore register offsets on Haswell EP
authorAndi Kleen <ak@linux.intel.com>
Tue, 4 Nov 2014 01:00:27 +0000 (17:00 -0800)
committerIngo Molnar <mingo@kernel.org>
Sun, 16 Nov 2014 08:45:47 +0000 (09:45 +0100)
commit55956a7f815329225e1ea81cdde9d49f421389ef
treecf0a667727f57db649606fc92907d9c363734b7f
parenta90c9fe6cc8d6b4053fa7eb37b70771ff056e225
perf/x86/intel/uncore: Fix IRP uncore register offsets on Haswell EP

The counter register offsets for the IRP box PMU for Haswell-EP
were incorrect. The offsets actually changed over IvyBridge EP.

Fix them to the correct values. For this we need to fork the read
function from the IVB and use an own counter array.

Tested-by: patrick.lu@intel.com
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Link: http://lkml.kernel.org/r/1415062828-19759-3-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c