]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Align "unfenced" tiled access on gen2, early gen3
authorChris Wilson <chris@chris-wilson.co.uk>
Sat, 25 Mar 2017 11:32:43 +0000 (11:32 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Mon, 27 Mar 2017 11:48:45 +0000 (12:48 +0100)
commit528d54beaef895fabe1b606886b5aab506e7e76c
treee4ff6afd9eb0c76a951205c47711b1c18106c030
parent7b10d8d786a2c639905f361d569a61b84100db22
drm/i915: Align "unfenced" tiled access on gen2, early gen3

Old devices have quite severe restrictions for using fences, and unlike
more recent device (anything from Pineview onwards) we need to enforce
those restrictions even for unfenced tiled access from the render
pipeline.

Fixes: c73f5783f4a4 ("drm/i915: Store required fence size/alignment for GGTT vma")
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.11-rc1+
Link: http://patchwork.freedesktop.org/patch/msgid/20170325113243.16438-1-chris@chris-wilson.co.uk
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem_execbuffer.c
drivers/gpu/drm/i915/i915_pci.c