]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/icl: Configure lane sequencing of combo phy transmitter
authorMadhav Chauhan <madhav.chauhan@intel.com>
Sun, 16 Sep 2018 10:53:24 +0000 (16:23 +0530)
committerJani Nikula <jani.nikula@intel.com>
Mon, 24 Sep 2018 13:55:47 +0000 (16:55 +0300)
commit4f0a52c3232e01af445c9ba77bc1da0b31fdca2c
tree79e6822b79fb64d6f3e069e577ea99f9001b6fd3
parentfc951f41c860e7f5ec34cce57c9477cb3d9960c9
drm/i915/icl: Configure lane sequencing of combo phy transmitter

This patch set the loadgen select and latency optimization for
aux and transmit lanes of combo phy transmitters. It will be
used for MIPI DSI HS operations.

v2: Rebase
v3: Add empty line to make code more legible (Ville).

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1537095223-5184-2-git-send-email-madhav.chauhan@intel.com
drivers/gpu/drm/i915/icl_dsi.c