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(parent: 446a01e) | patch
clk: hisilicon: add common clock support
authorHaojian Zhuang <haojian.zhuang@gmail.com>
Wed, 13 Nov 2013 00:51:23 +0000 (08:51 +0800)
committerHaojian Zhuang <haojian.zhuang@gmail.com>
Wed, 4 Dec 2013 10:36:45 +0000 (18:36 +0800)
commit4c42cb44a85acb03ba205d128a8ae881036772fd
tree79608f2bdc02486b7faad8d451b53428d40a348etree | snapshot
parent446a01ebfd5c46dcad993153e533f5f1d30e2d44commit | diff
clk: hisilicon: add common clock support

Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is
used to support the clock gate that enable/disable/status registers
are seperated.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Documentation/devicetree/bindings/clock/hi3620-clock.txt [new file with mode: 0644] blob
drivers/clk/Makefile diff | blob | history
drivers/clk/hisilicon/Makefile [new file with mode: 0644] blob
drivers/clk/hisilicon/clk-hi3620.c [new file with mode: 0644] blob
drivers/clk/hisilicon/clk.c [new file with mode: 0644] blob
drivers/clk/hisilicon/clk.h [new file with mode: 0644] blob
drivers/clk/hisilicon/clkgate-separated.c [new file with mode: 0644] blob
include/dt-bindings/clock/hi3620-clock.h [new file with mode: 0644] blob
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