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Merge tag 'trbe-cortex-a510-errata' of gitolite.kernel.org:pub/scm/linux/kernel/git/coresight/linux into for-next/fixes

coresight: trbe: Workaround Cortex-A510 erratas

This pull request is providing arm64 definitions to support
TRBE Cortex-A510 erratas.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
* tag 'trbe-cortex-a510-errata' of gitolite.kernel.org:pub/scm/linux/kernel/git/coresight/linux:
  arm64: errata: Add detection for TRBE trace data corruption
  arm64: errata: Add detection for TRBE invalid prohibited states
  arm64: errata: Add detection for TRBE ignored system register writes
  arm64: Add Cortex-A510 CPU part definition

author	Catalin Marinas <catalin.marinas@arm.com>
	Fri, 28 Jan 2022 16:14:06 +0000 (16:14 +0000)
committer	Catalin Marinas <catalin.marinas@arm.com>
	Fri, 28 Jan 2022 16:14:06 +0000 (16:14 +0000)
commit	4c419ac87318f5c2c6853e7b2f95b454d3092750
tree	784072ce56298e53c62aebba5c4656812475949d	tree \| snapshot
parent	e47eb8a228f1e6a2a40a7079e0515f6612a530b0	commit \| diff
parent	770b2471223f2435702afdc7061d41638f640ac3	commit \| diff

Documentation/arm64/silicon-errata.rst	diff1 \|	diff2 \|	blob \| history
arch/arm64/Kconfig	diff1 \|	diff2 \|	blob \| history
arch/arm64/include/asm/cputype.h	diff1 \|	diff2 \|	blob \| history
arch/arm64/kernel/cpu_errata.c	diff1 \|	diff2 \|	blob \| history