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(parent: fa6f954) | patch
clk: renesas: r9a07g044: Add OSTM clock and reset entries
authorBiju Das <biju.das.jz@bp.renesas.com>
Wed, 10 Nov 2021 08:20:19 +0000 (08:20 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 15 Nov 2021 09:47:18 +0000 (10:47 +0100)
commit4c1e4134870820cc587ac80117ac3162e43bd4a3
tree917ee5f5ecdeaa3c9f8e76d876d0bd0f8201b37btree | snapshot
parentfa6f954deb4d90fea5228d02123571fd52483491commit | diff
clk: renesas: r9a07g044: Add OSTM clock and reset entries

Add OSTM{0,1,2} clock and reset entries to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211110082019.28554-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g044-cpg.c diff | blob | history
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