ARM: dts: at91: sama7g5ek: to not touch slew-rate for SDMMC pins

ARM: dts: at91: sama7g5ek: to not touch slew-rate for SDMMC pins

With commit 3dc9dc66843f ("pinctrl: at91-pio4: add support for slew-rate")
and commit 006a9b1630cc ("pinctrl: at91-pio4: Fix slew rate disablement")
the slew-rate is enabled by default for each configured pin. The datasheet
specifies at chapter "Output Driver AC Characteristics" that HSIO
drivers (use in SDMMCx and QSPI0 peripherals), don't have a slewrate
setting but are rather calibrated against an external 1% resistor mounted
on the SDMMCx_CAL or QSPI0_CAL pins. Depending on the target signal
frequency and the external load, it is possible to adjust their target
output impedance. Thus set slew-rate = <0> for SDMMC (QSPI is not enabled
at the moment in device tree).

Fixes: 7c5647a053b5 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210915074836.6574-3-claudiu.beznea@microchip.com