]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/bdw: Add support for DRRS to switch RR
authorVandana Kannan <vandana.kannan@intel.com>
Fri, 13 Feb 2015 10:03:00 +0000 (15:33 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 24 Feb 2015 10:51:37 +0000 (11:51 +0100)
commit4983f5f0c5c5338b5c651a789137171bb7c2352f
tree70150e9b9985ea8c35ca8aeba46aaf1ade1a27f7
parentf46268bc94ad17bda05eac405361eb5da6f25a1f
drm/i915/bdw: Add support for DRRS to switch RR

For Broadwell, there is one instance of Transcoder MN values per transcoder.
For dynamic switching between multiple refreshr rates, M/N values may be
reprogrammed on the fly. Link N programming triggers update of all data and
link M & N registers and the new M/N values will be used in the next frame
that is output.

V2: [By Ram]: intel_dp_set_m_n() is rewritten to accommodate
gen >= 8 [Rodrigo]
V3: Coding style correction [Ram]
V4: [By Ram] intel_dp_set_m_n modifications are moved into a
separate patch, retaining only DRRS related changes here [Rodrigo]

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: Pradeep Bhat <pradeep.bhat@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c