clk: ingenic: Fix incorrect data for the i2s clock
authorPaul Cercueil <paul@crapouillou.net>
Wed, 27 Jun 2018 12:14:58 +0000 (14:14 +0200)
committerStephen Boyd <sboyd@kernel.org>
Fri, 6 Jul 2018 18:47:27 +0000 (11:47 -0700)
commit486cb020f679c36bab8e91aa273e2305ff76b724
tree05f31b76958f5f13727b0ec57738007478e3f4bf
parent0d5624e606504772b89d3c3d6b1be740ef176c61
clk: ingenic: Fix incorrect data for the i2s clock

The register field for configuring the divider for the i2s clock
occupies the bits [8-0], which means 9 bits and not 8.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/ingenic/jz4740-cgu.c