]> git.baikalelectronics.ru Git - kernel.git/commit
ARM: dts: NSP: Fix PPI interrupt types
authorFlorian Fainelli <f.fainelli@gmail.com>
Tue, 7 Nov 2017 19:10:29 +0000 (11:10 -0800)
committerFlorian Fainelli <f.fainelli@gmail.com>
Mon, 27 Nov 2017 19:22:29 +0000 (11:22 -0800)
commit466e37e6726056221c5140e8b2db54b853e5dc35
treebc7d4e3c07dc4e31a07d9cd1283c110f39602e40
parent41bacd13766e23029b1b1c84c5f445a7c8e3d284
ARM: dts: NSP: Fix PPI interrupt types

Booting a kernel results in the kernel warning us about the following
PPI interrupts configuration:
[    0.105127] smp: Bringing up secondary CPUs ...
[    0.110545] GIC: PPI11 is secure or misconfigured
[    0.110551] GIC: PPI13 is secure or misconfigured

Fix this by using the appropriate edge configuration for PPI11 and
PPI13, this is similar to what was fixed for Northstar (BCM5301X) in
commit 9fb0c3ba51d8 ("ARM: dts: BCM5301X: Correct GIC_PPI interrupt
flags").

Fixes: 1d1c19316a48 ("ARM: NSP: add minimal Northstar Plus device tree")
Fixes: 75e673852107 ("ARM: dts: NSP: Add TWD Support to DT")
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm-nsp.dtsi