]> git.baikalelectronics.ru Git - kernel.git/commit
arm64: Unconditionally enable IESB on exception entry/return for firmware-first
authorJames Morse <james.morse@arm.com>
Mon, 15 Jan 2018 19:38:58 +0000 (19:38 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Tue, 16 Jan 2018 15:06:45 +0000 (15:06 +0000)
commit464827f776f3d7405a9d11f70290c4f383b81735
tree5c725eb3448f516dac4ed8c64068ec0d35553d47
parentd0089ce175926c58a9db8a98294c907908cdeed0
arm64: Unconditionally enable IESB on exception entry/return for firmware-first

ARM v8.2 has a feature to add implicit error synchronization barriers
whenever the CPU enters or returns from an exception level. Add this to the
features we always enable. CPUs that don't support this feature will treat
the bit as RES0.

This feature causes RAS errors that are not yet visible to software to
become pending SErrors. We expect to have firmware-first RAS support
so synchronised RAS errors will be take immediately to EL3.
Any system without firmware-first handling of errors will take the SError
either immediatly after exception return, or when we unmask SError after
entry.S's work.

Adding IESB to the ELx flags causes it to be enabled by KVM and kexec
too.

Platform level RAS support may require additional firmware support.

Cc: Christoffer Dall <christoffer.dall@linaro.org>
Suggested-by: Will Deacon <will.deacon@arm.com>
Link: https://www.spinics.net/lists/kvm-arm/msg28192.html
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/sysreg.h