]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/skl: Add support for edp 1.4 intermediate frequencies
authorSonika Jindal <sonika.jindal@intel.com>
Thu, 5 Mar 2015 04:32:30 +0000 (10:02 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 17 Mar 2015 21:29:57 +0000 (22:29 +0100)
commit4363a64cdef0abf270d184ba803251a0ae41795d
tree550b9ed52e08d8b01621c331f605aad4e29ab080
parent435a1a9bd17924e1cbc6a14ce11952658327197d
drm/i915/skl: Add support for edp 1.4 intermediate frequencies

eDp 1.4 supports custom frequencies.
Skylake supports following intermediate frequencies : 3.24 GHz, 2.16 GHz and
4.32 GHz along with usual LBR, HBR and HBR2 frequencies.
Read sink supported frequencies and get common frequencies from sink and
source and use these for link training.

v2: Rebased, removed calculation of min_clock since for edp it is taken as
max_clock (as per comment).
v3: Keeping single array for link rates (Satheesh)
v4: Setting LINK_BW_SET to 0 when setting LINK_RATE_SET (Satheesh)
v5: Some minor nits (Ville)
v6: Keeping separate arrays for source and sink rates (Ville)
v7: Remove redundant setting of DP_LINK_BW_SET to 0 (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h