]> git.baikalelectronics.ru Git - uboot.git/commit
riscv: Add indirect stringification to csr_xxx ops
authorBin Meng <bmeng.cn@gmail.com>
Wed, 12 Dec 2018 14:12:39 +0000 (06:12 -0800)
committerAndes <uboot@andestech.com>
Tue, 18 Dec 2018 01:56:27 +0000 (09:56 +0800)
commit42e73179dcc2665fe49da1c0f4f6b80b514734c9
tree4fa6a9062fec81a98ec795f031a62b016e570127
parent5a5203d6cea62e6872f056ada07f8782727ab5fb
riscv: Add indirect stringification to csr_xxx ops

With current csr_xxx ops, we cannot pass a macro to parameter
'csr', hence we need add another level to allow the parameter
to be a macro itself, aka indirect stringification.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/csr.h