]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Group the irq breadcrumb variables into the same cacheline
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 6 Jul 2016 11:39:02 +0000 (12:39 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 6 Jul 2016 11:47:39 +0000 (12:47 +0100)
commit41b1ffde2f1d9475170232af8cc77f835b2cf228
treea2951a0be74a87f21e6170674dc39f4dbc301a2b
parent11182b8abbec0f941b8242519ad74922fee0c853
drm/i915: Group the irq breadcrumb variables into the same cacheline

As we inspect both the tasklet (to check for an active bottom-half) and
set the irq-posted flag at the same time (both in the interrupt handler
and then in the bottom-halt), group those two together into the same
cacheline. (Not having total control over placement of the struct means
we can't guarantee the cacheline boundary, we need to align the kmalloc
and then each struct, but the grouping should help.)

v2: Try a couple of different names for the state touched by the user
interrupt handler.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1467805142-22219-3-git-send-email-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/intel_breadcrumbs.c
drivers/gpu/drm/i915/intel_ringbuffer.h