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(parent: 466c044) | patch
ARM: tegra: fix pclk rate
authorStephen Warren <swarren@nvidia.com>
Fri, 20 Apr 2012 22:58:18 +0000 (16:58 -0600)
committerStephen Warren <swarren@nvidia.com>
Wed, 25 Apr 2012 21:22:09 +0000 (15:22 -0600)
commit37fb9584bdde42c8585875a46e6e847b994acf46
tree43328bab20e3fe0e2c0a613b5860eabd4802342ftree | snapshot
parent466c04480399b4ca2ec7d56227848fad4d4f0f2acommit | diff
ARM: tegra: fix pclk rate

Commit 40f9cf0 "ARM: tegra: reparent sclk to pll_c_out1" changed the
rate of hclk. Since pclk is derived from that, and only has integer
dividers, the pclk rate needs to change in the same fashion, from 54MHz
to 60MHz.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/common.c diff | blob | history
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