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(parent: da925d5) | patch
clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()
authorHai Pham <hai.pham.ud@renesas.com>
Fri, 22 May 2020 03:39:04 +0000 (10:39 +0700)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Fri, 21 May 2021 13:00:17 +0000 (15:00 +0200)
commit37e2a3b8f95151460e894125ac095769453a8088
tree64111125cf62505dfba48c12a8a8d40e3f751aa1tree | snapshot
parentda925d53c95e8dcce695d09888ffb1d01a2fdb74commit | diff
clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()

CPG IP in some specific Renesas SoCs (i.e. new R8A779A0 V3U SoC)
requires a different setting procedure. Make struct cpg_mssr_info
accessible to handle the clock setting in that case.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
drivers/clk/renesas/clk-rcar-gen2.c diff | blob | history
drivers/clk/renesas/clk-rcar-gen3.c diff | blob | history
drivers/clk/renesas/renesas-cpg-mssr.c diff | blob | history
drivers/clk/renesas/renesas-cpg-mssr.h diff | blob | history
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