]> git.baikalelectronics.ru Git - uboot.git/commit
riscv: andes_plic: Fix riscv_get_ipi() mask
authorBin Meng <bmeng.cn@gmail.com>
Tue, 15 Jun 2021 05:45:57 +0000 (13:45 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 17 Jun 2021 01:39:46 +0000 (09:39 +0800)
commit37142029339a923ee5f5734cd989cd1228825e15
tree086819c8f5cbcab23e7932ab7d9aa747d3aed8e1
parent4d4727e953be0638df28829bf42a53845e7cd9d6
riscv: andes_plic: Fix riscv_get_ipi() mask

Current logic in riscv_get_ipi() for Andes PLICSW does not look
correct. The mask to test IPI pending bits for a hart should be
left shifted by (8 * gd->arch.boot_hart), just the same as what
is done in riscv_send_ipi().

Fixes: 5c75bf9233be ("riscv: add functions for reading the IPI status")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
arch/riscv/lib/andes_plic.c