]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/icl: restore WaEnableFloatBlendOptimization
authorTalha Nassar <talha.nassar@intel.com>
Fri, 1 Feb 2019 01:08:44 +0000 (17:08 -0800)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 1 Feb 2019 08:39:53 +0000 (08:39 +0000)
commit369ca8e74b5a6a991b442aa079ebf45377258cf2
tree76644bf5361c636fc333ec3f91068a8f8af85ee6
parente799659ddb790aa5cc164b4b94ac085e2bd4cd2f
drm/i915/icl: restore WaEnableFloatBlendOptimization

Enables blend optimization for floating point RTs

This restores the workaround that was reverted in 4145038b8617
("Revert "drm/i915/icl: WaEnableFloatBlendOptimization"").

The revert was due to the register write seemingly not sticking,
but the HW team has confirmed that this is because the
register is WO and that the workaround is indeed required.

Here the wa is added with a mask of 0 since the register is WO.

References: https://hsdes.intel.com/resource/1408134172
References: https://bugs.freedesktop.org/show_bug.cgi?id=107338
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Talha Nassar <talha.nassar@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/1548983324-15344-4-git-send-email-talha.nassar@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_workarounds.c