]> git.baikalelectronics.ru Git - kernel.git/commit
ARM: 8593/1: cache-l2x0.c: Do not clear bit 23 in prefetch control register
authorAndrey Smirnov <andrew.smirnov@gmail.com>
Wed, 3 Aug 2016 19:33:34 +0000 (20:33 +0100)
committerRussell King <rmk+kernel@armlinux.org.uk>
Fri, 12 Aug 2016 15:47:04 +0000 (16:47 +0100)
commit3685c3e456ed49f9af5f0908a151810c408b8ad5
tree18028ea6bd367aff08d068f63c24fe5fb8524a69
parent643faff3006502f82740cd616f293fcf5d0ca7b0
ARM: 8593/1: cache-l2x0.c: Do not clear bit 23 in prefetch control register

As per L2C-310 TRM[1]:

"... You can control this feature using bits 30,27 and 23 of the
Prefetch Control Register. Bit 23 and 27 are only used if you set bit 30
HIGH..."

which means there is no need to clear bit 23 if bit 30 is being cleared.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0246e/CJAJACBJ.html

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mm/cache-l2x0.c