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(parent: 2a4cb2f) | patch
pci: renesas: Fix BAR mapping on Gen3
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Fri, 15 Jan 2021 23:33:17 +0000 (00:33 +0100)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Sat, 20 Feb 2021 21:38:28 +0000 (22:38 +0100)
commit32814224789a0329c0f2c50ea330b02c6a1a30bd
treecc0d2e5e1414a6237f246ab788c7f1e568b4da64tree | snapshot
parent2a4cb2fa22a60a40bfcabe84774f48add84be717commit | diff
pci: renesas: Fix BAR mapping on Gen3

Because the first PCIExAR(n) register is configured with the mapping,
It is the second PCIExAR(n) register that must be written with 0, not
the last one. Update the n from 4 to 1 to select the correct register.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
drivers/pci/pci-rcar-gen3.c diff | blob | history
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