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(parent: dcd48b2) | patch
clk: meson: axg: Remove MIPI enable clock gate
authorRemi Pommarel <repk@triplefau.lt>
Mon, 9 Mar 2020 21:01:56 +0000 (22:01 +0100)
committerJerome Brunet <jbrunet@baylibre.com>
Tue, 9 Feb 2021 12:32:59 +0000 (13:32 +0100)
commit31035839540e3f1669f9e47222108e9278651943
treede1c67050817de94ecabd93b954882423850aee5tree | snapshot
parentdcd48b25c682106335d48c040eeaaf0ff5575c38commit | diff
clk: meson: axg: Remove MIPI enable clock gate

On AXG platforms HHI_MIPI_CNTL0 is part of the MIPI/PCIe analog PHY
region and is not related to clock one and can be removed from it.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
drivers/clk/meson/axg.c diff | blob | history
drivers/clk/meson/axg.h diff | blob | history
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