pinctrl: uniphier: add UART hardware flow control pin-mux settings
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Mon, 19 Mar 2018 08:13:14 +0000 (17:13 +0900)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 27 Mar 2018 13:14:43 +0000 (15:14 +0200)
commit2fe8f2a14e93331a30c11c545c1ef13a416fa70e
tree922222a02148ea3b42cfd0e51e66c701ec670dca
parent3aefbbde0be41a2a4f85cd8b73bfbcca7b1e017b
pinctrl: uniphier: add UART hardware flow control pin-mux settings

UniPhier SoCs have the following pins for hardware flow control of UART:
  XRTS, XCTS
and for modem control of UART:
  XDTR, XDSR, XDCD, XRI

The port number with the flow control is SoC-dependent.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c
drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c
drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c
drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c