]> git.baikalelectronics.ru Git - kernel.git/commit
dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tue, 26 Jul 2022 17:45:25 +0000 (18:45 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 2 Sep 2022 08:47:30 +0000 (10:47 +0200)
commit2d2bcac7b01e96268c59380a047bf5982fedd4b5
tree200f04e9f1ce401648da9f3be9e7a939db16262b
parentec0ad1730437ab9a47bc3431e3fc61fb16440675
dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC

The CPG block on the RZ/Five SoC is almost identical to one found on the
RZ/G2UL SoC. "renesas,r9a07g043-cpg" compatible string will be used on
the RZ/Five SoC so to make this clear, update the comment to include
RZ/Five SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220726174525.620-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml