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(parent: 24eeb9a) | patch
ASoC: Fix WM8996 24.576MHz clock operation
authorMark Brown <broonie@opensource.wolfsonmicro.com>
Sat, 10 Dec 2011 12:38:32 +0000 (20:38 +0800)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Sat, 10 Dec 2011 19:01:09 +0000 (03:01 +0800)
commit2225ff2bc75fb1964b724496193d9eca53c4484b
tree9d05123c5b167ab8bb3b815e5becf537d54bfd92tree | snapshot
parent24eeb9a47baf26e413f7121865d1adc4eb537d05commit | diff
ASoC: Fix WM8996 24.576MHz clock operation

Record the clock after the divider as that is what all SYSCLK users see.
Without this the other clock configuration in the device comes out at
half rate.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
sound/soc/codecs/wm8996.c diff | blob | history
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