]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/dg2: Add cdclk table and reference clock
authorMatt Roper <matthew.d.roper@intel.com>
Wed, 21 Jul 2021 22:30:36 +0000 (15:30 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Thu, 22 Jul 2021 16:29:08 +0000 (09:29 -0700)
commit1f3e84c4edcd357eeb608d709c9c2dcb3193c841
tree54e22070dbef14f4f97be39046c4b3fe31e289d3
parent3176fb663c0b0ea5d3edd179cb1252f680e55fbf
drm/i915/dg2: Add cdclk table and reference clock

Note that DG2 only has a single possible refclk frequency (38.4 MHz).

v2:
 - Drop two now-unused cdclk entries

Bspec: 54034
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721223043.834562-12-matthew.d.roper@intel.com
drivers/gpu/drm/i915/display/intel_cdclk.c