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(parent: 0c9e42a) | patch
MIPS: lantiq: adds code for booting GPHY
authorJohn Crispin <blogic@openwrt.org>
Fri, 9 Nov 2012 12:43:30 +0000 (13:43 +0100)
committerJohn Crispin <blogic@openwrt.org>
Sun, 11 Nov 2012 17:47:35 +0000 (18:47 +0100)
commit1c5f2b3b7df15a26d591ec9f29ac77a2c39d1f7e
tree15256dca6cca0566f6fa3ca766a7572c627cef97tree | snapshot
parent0c9e42a74e439dcae73c225ca5fcfca7521456b2commit | diff
MIPS: lantiq: adds code for booting GPHY

The XRX200 family of SoCs has embedded gigabit PHYs. This patch adds code to
boot them up.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4522
arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h diff | blob | history
arch/mips/lantiq/xway/reset.c diff | blob | history
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