]> git.baikalelectronics.ru Git - kernel.git/commit
cxl: Set the PBCQ Tunnel BAR register when enabling capi mode
authorPhilippe Bergheaud <felix@linux.ibm.com>
Mon, 14 May 2018 08:27:35 +0000 (10:27 +0200)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 15 May 2018 11:29:53 +0000 (21:29 +1000)
commit19e20740736cc42f3c7997a6c8db66bb5f61a9e6
tree27ccc1a987b4492d50e81b06d12e6de80193421a
parenta9e4c40d10d09a6302cfe13bff3883cad48a47fa
cxl: Set the PBCQ Tunnel BAR register when enabling capi mode

Skiboot used to set the default Tunnel BAR register value when capi
mode was enabled. This approach was ok for the cxl driver, but
prevented other drivers from choosing different values.

Skiboot versions > 5.11 will not set the default value any longer.
This patch modifies the cxl driver to set/reset the Tunnel BAR
register when entering/exiting the cxl mode, with
pnv_pci_set_tunnel_bar().

That should work with old skiboot (since we are re-writing the value
already set) and new skiboot.

mpe: The tunnel support was only merged into Linux recently, in commit
ac3c1ca3e85e ("powerpc/powernv: Enable tunneled operations")
(v4.17-rc1), so with new skiboot kernels between that commit and this
will not work correctly.

Fixes: ac3c1ca3e85e ("powerpc/powernv: Enable tunneled operations")
Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com>
Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
drivers/misc/cxl/pci.c